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ASIC Synthesis Engineer

Company: Technical Link
Location: Santa Barbara
Posted on: September 7, 2018

Job Description:

Job Description: We are seeking candidates for a digital design engineering position. In this position you will be part of a team designing next-generation digital visible and infrared image sensors. You will work as a senior digital design engineers to implement digital blocks (1k * 1M gates) in a variety of CMOS nodes (from 180nm to 28nm). A successful candidate will excel at collaborating in a fast-paced multidisciplinary team environment working to develop cutting-edge image sensor products. Required Skills: * Core expertise in writing RTL, synthesis or place and route (Cadence tools preferred)* Experience and expertise with Verilog and or SystemVerilog, writing RTL and test benches * Experience and expertise of digital design fundamentals including synchronous digital design principles and timing closure * Experience and expertise with full digital design flow from writing RTL through synthesis, static timing analysis and place-and-route. * Experience and expertise with scripting languages including TCL* Ability to coordinate within design team (With analog designers, mixed signal designers and full custom physical designers)* IC Device Test Support; Provide assistance (as required) to test engineering to perform test verification* Excellent presentation, documentation, and communication skills.* Must be process oriented and able to complete designs on schedule and within budget. Desired Skills: * Experience writing behavioral models for digital circuits and analog/mixed signal interfaces and circuits* Experience with a Digital-on-top design flow* Knowledge of high-end UNIX based software design tools for circuit simulation, transistor model extraction, layout and layout automation, and verification is helpful. * Experience with Cadence tools is a plus (Conformal, Innovus and Tempus)* Experience with LVDS transmitters and receivers, and radiation and cryogenic tolerant design techniques is desirable* Prior experience successfully executing quick turn developments for commercial, defense, and/or space industries. Required Education (including Major): * MSEE or PhD in Electrical Engineering, or equivalent experience. - provided by Dice ASIC Design, RTL, STA, Cadence, Synthesis, etc.

Keywords: Technical Link, Santa Barbara , ASIC Synthesis Engineer, Engineering , Santa Barbara, California

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